FAQs
What type of degree is required for this internship?
Candidates must be currently pursuing an MS or PhD in Electrical Engineering.
Is there a minimum GPA requirement?
Yes, the minimum GPA requirement is 3.0.
What specific areas of design will the intern be involved in?
The intern will contribute to the design of functional blocks including LNA and RF Switches using SOI and CMOS technologies.
Are there any specific software tools that interns should be familiar with?
Yes, familiarity with software such as Cadence, ADS or AWR, FEM, or HFSS is preferred.
What kind of experience is beneficial for applicants?
Analog/RF circuit design coursework and experience, as well as exposure to RF measurement equipment such as spectrum analyzers and network analyzers, is beneficial.
What type of work environment should interns expect?
Interns should expect a collaborative team-based work environment that is fast-paced.
Will interns receive mentorship during the program?
Yes, interns will receive mentoring and coaching from industry experts.
Is there an opportunity for interns to present their work?
Yes, interns will have the opportunity to deliver a final presentation to business leaders.
Are networking events included in the internship program?
Yes, the internship program includes networking and social events.
Are there specific responsibilities regarding simulation and validation?
Yes, interns will generate and simulate EM models in HFSS for silicon design integration and validation.