FAQs
What is the role of a Chiplet Digital Design Engineer at Analog Devices?
The Chiplet Digital Design Engineer will help shape ADI's corporate chiplet strategy, developing and executing projects related to chiplet designs, die-to-die interfaces, and reference architectures across various product lines.
What qualifications are required for this position?
A B.S. or equivalent with 3 years of experience, or an M.S. or equivalent with 0-2 years of experience, or a PhD in Electrical Engineering or a related discipline is required.
What kind of experience is preferred for this role?
Familiarity with interfaces like UCIe, BoW, XSR/USR SerDes, PCIe, or Ethernet, experience with network-on-chip (NoC) protocols, and system modeling software are preferred.
Is there any travel required for this position?
Yes, there is required travel, estimated at about 10% of the time.
What opportunities for career development does Analog Devices offer?
Analog Devices is committed to investing in employee growth, including high-impact professional development opportunities, meaningful projects tied to business goals, and exposure to executive leadership.
Is participation in standards organizations expected in this role?
Yes, participation and contribution to chiplet standards organizations like UCIe, OCP, or ARM CSA is part of the responsibilities.
Is this position open to international candidates?
Candidates for this position may need to go through an export licensing review process, particularly if they are not U.S. Citizens or Permanent Residents.
What is the company culture like at Analog Devices?
ADI fosters a culture that focuses on innovation, employee well-being, and creating a sustainable future, with programs for continuous learning and professional growth.
Are there specific chiplet technologies that this role will focus on?
Yes, the role will focus on technologies including standard and proprietary die-to-die interfaces for chiplet applications within ADI's product portfolio.
What type of projects will I be leading in this role?
You will lead R&D projects that evaluate chiplet designs, develop workflows for integrating external chiplets, and support product lines with case studies on die-disaggregation.